1. Field of the Invention
This invention relates to a method for forming trench isolation in the integrated circuit.
2. Description of the Prior Art
In these years, the space between transistors has been getting smaller and smaller along with the increase of the density of memory cells in the integrated circuit. To secure the operation of each transistor from the disturbance of any other, something has to be done to isolate every transistor that the phenomenon of latch up could be avoided. This kind of technique is called xe2x80x9cisolation processxe2x80x9d.
Local oxidation(LOCOS) has been widely used in the early years. It forms a field oxide layer of several thousands anstrons between transistors by thermal oxidation. Because silicon dioxide is not an electric conductor, it could act as isolation between transistors. But some unavoidable shortage happens when using local isolation. The phenomenon of xe2x80x9cbird""s beakxe2x80x9d will take place during the formation of field oxide by wet oxidation, which can affect the subsequent progress in the active device region. Furthermore, the effect of xe2x80x9cbird""s beakxe2x80x9d goes more and more serious when the manufacturing technique enters into the sub-micrometer or even the deep sub-micrometer realm. In addition, before the formation of field oxide, ions have to be implanted and then drived into the silicon substrate to form a channel stop. As the manufacturing technique gets into the sub-micrometer or deep sub-micrometer realm, narrow-width effect happens as a result of subsequent high temperature treatments. Therefore, a lot of isolation processes have been developed to meet the requirement in the realm of sub-micrometer and even deep sub-micrometer.
One of the most popular method is shallow trench isolation. It is done by firstly opening a shallow trench in the silicon substrate through etching, filling dielectric into the shallow trench and then performing etching back. Then the active devices will be built in the space between separate isolation regions. In the practical design of the integrated circuit, some regions need only isolation with smaller area, some others need the isolation with larger area. The latter ones suffer from xe2x80x9cdishing effectxe2x80x9d during the progress of filling dielectric and etching it back. It is because that it takes a long time to etch back the very thick dielectric layer outside the shallow trench, thus over-etching is easily happened. In addition, the kink effect happens when subsequently forming the gate oxide by thermal oxidation. The so called xe2x80x9ckink effectxe2x80x9d denotes abnormal turning-on of transistors. The reason of its happening is that the thickness of the shallow trench shrinks at the edge, resulting in larger electrical field around there. This kind of isolation technique is also unable to meet the electric requirement of transistors
To solve the problem of dishing effect, many processes have been developed. For example, divide the shallow trench with large area into several small ones. But all of those methods include complicated steps and cost a lot. So they are all improper to take place of local isolation.
It is therefore an object of this invention to offer a method of forming shallow trench isolation.
Another object of this invention is to provide a shallow trench isolation technique used in the isolation process of the integrated circuit.
The above goals have been reached through the following steps. Firstly, a layer of the first oxide layer and the first silicon nitride layer are subsequently formed, and the region of shallow trench is defined by lithography. Then taking the first oxide layer and the first silicon nitride layer as hard mask, perform etching on silicon substrate to form the shallow trenches with smaller area and the shallow trench with larger area, following with the step of thermal oxidation. Then the second silicon dioxide layer is deposited to form the shallow trench which has smaller area and the shallow trench which has larger area. The second silicon oxide is formed by plasma-enhanced chemical vapor deposition. After that, an organic spin-on-glass is coated and low temperature baking is performed.
A recipe whose etching rate to the second silicon oxide is higher then to spin-on-glass is used to perform partial etching back to remove spin-on-glass outside the shallow trench. Then the curing step at temperature higher then 800xc2x0 C. and etching back by chemical mechanical polishing are performed. Silicon nitride is set as the endpoint of etching. After removing the silicon nitride layer, take away the first silicon oxide layer. Then the method for forming shallow trench isolation provided by the present invention is thus accomplished.